时间 : 2016年05月04日 09时00分
地点 : 重庆大学主教504会议室
主办单位 : 计算机学院
主讲人 : Ahmed Louri，IEEEFellow，Edwin Sha ，李涛，邵子立
报告一：Power-Efficient and Reliable Network-on-Chips for Scalable Multicore Architectures
Today’s microprocessor designers have resorted to increasing the number of cores per die as a power-efficient approach to performance improvement, leading to the Chip Multiprocessors (CMPs) or the multicore era. Both industrial and academic roadmaps project that hundreds to thousands of general-purpose tera-op CMPs will be needed within a decade in order to satisfy future needs for high-performance computing.
The proliferation of multiple cores on the same die heralded the advent of a communication-centric, rather than computation-centric systems, to the forefront of computing design wherein the design of the on-chip interconnect fabric connecting various modules, namely the processing cores, cache banks, and memory units, has become extremely important. Further, the continuing scaling of technology has accentuated the on-chip interconnect problem since global wire delays do not scale down as fast as gate delays. To address the growing wire delay problems and improve the performance, a growing number of multicore designs have adopted a more flexible and scalable packet-switched architecture called Network-on-Chip (NoC) architectures. As the number of cores on the chip keeps growing to satisfy power and performance scaling, the NoC design has become the most critical element to achieving the performance potential of future CMPs. Among the challenges facing current NoC design, power dissipation and reliability have been identified as the most critical ones.
In this talk, I will first discuss several research challenges facing multicore architectures and NoC design. Next I will present some of our ongoing efforts to address these issues using architectural innovations as well as a synergistic mix of emerging interconnect technologies. The talk will conclude with pointers to some future research directions in this area
报告二：The work to Design the Most Efficient In-Memory Storage System
主讲人：Edwin Sha （沙行勉)，重庆大学计算机学院院长
This talk will discuss, from the perspective of system software, how to design the most efficient in-memory storage system, in particular files system and data system. As the emerging technologies of persistent memory, like PCM, MRAM, provide opportunities for preserving data in memory, traditional storage system structures may need re-studying and re-designing. The talk will present a work d on a new concept that each file has its own ``Virtual Address Space." A file system, Sustainable In-Memory File System (SIMFS), is then designed and fully implemented. The experiments show that SIMFS is the fastest in-memory file system. This work has lots of potential to explore; some new optimization techniques are further designed. We also briefly present the most efficient index structures we recently developed for NVM- d relational data . All of the results give the best known ones in literatures.
报告三：Innovating Next Generation Computer Architecture in Big Data Era: Think Big, See Small
Computer architecture forms the foundation of society’s information technology. This foundation, which was laid several decades ago, is facing grand challenges today as power limits and reduced semiconductor reliability make it increasingly more difficult to leverage CMOS scaling, and the shift towards data centers, big data and cloud computing will include sustainability requirements for traditional architectures. At the same time, there are emerging technologies such as green and clean energy computing, scalable memory devices, advanced integration and interconnect methodologies that can be game-changers in the future. A new plethora of computer architectures can be built by exploiting innovative concepts, mechanisms and implementations that take advantages of these emerging technologies while addressing new design challenges in big data era.
In this talk, I will address the opportunities and challenges of integrating renewable energy technologies that enable high-performance and sustainable computer and data center architectures. Designing renewable energy driven computer systems poses various challenges in terms of intelligent control strategies for better energy utilization, optimizations for reducing overhead, and improving reliability. I will discuss new mechanisms for data centers that can achieve high efficiency and dependability in utilizing renewable energy. Moreover, I will address the challenges and opportunities of fully exploiting the potential of emerging phase-change memory technologies to improve computer system memory performance, power-efficiency and reliability for big data applications. Although technology scaling and advanced material engineering provide smaller and denser devices, they make achieving these design goals increasingly challenging. I will introduce holistic and cross- design approaches that leverage nano-scale CMOS fabrication technologies, emerging integration methodologies and advanced material engineering.
报告四：Bridging Semantic Gaps in Key-Value Storage Systems with Software-Defined SSDs
Key-value (KV) stores become critical as they are one of the most important building blocks in modern web infrastructures and high-performance data-intensive applications. For example, KV storage systems such as Memcached and Redis have been widely adopted as web cache in data -driven web systems, and KV stores are also the backbone technique in large-scale distributed NoSQL data s such as LevelDB at Google, Dynamo at Amazon, and Cassandra at Apache. In KV stores, fast, predictable KV access latency is the key performance indicator. However, grand challenges are posted for KV stores to achieve this, particularly when handling real-time applications such as high-frequency trading, online advertising, and online TVs/gaming.
In this talk, I will present our recent work in optimizing flash- d key-value cache systems. In particular, I will discuss how to bridge the semantic gap between hardware/software by directly opening device-level details to key-value cache systems. In this way, we can leverage the domain knowledge of key-value caches and the unique device-level properties, so as to maximize the efficiency of a key-value cache system on flash devices while minimizing its weakness.
Dr. Ahmed Louri is the David and Marilyn Karlgaard Professor and the Chairman of the Department of Electrical and Computer Engineering in the School of Engineering and Applied Sciences at The George Washington University. Dr. Ahmed Louri received the M.S and Ph.D. degrees in Computer Engineering from the University of Southern California, Los Angeles in 1984 and 1988 respectively. Prior to joining GWU in August 2015, he was a Professor of Electrical and Computer Engineering and the Director of the High-Performance Computing Architectures and Technologies Laboratory at the University of Arizona from 1988 to 2015. Dr. Louri chaired the Computer Engineering Program of the Electrical and Computer Engineering Department at the University of Arizona from 2000 to 2006.
From 2010 to 2013, he served as a Program Director in the Directorate for Computer and Information Science and Engineering (CISE) of the National Science Foundation with an annual research portfolio of $800 million. He managed the core computer architecture program and was on the management team of several cross-cutting programs including cyber-physical systems (CPS), Expeditions in Computing (EIC), Computing Research Infrastructure (CRI), Trustworthy Computing (SaTC), and Failure-Resistant Systems (FRS).
He previously held visiting scientist positions at the Communications Research Laboratory (Tokyo, Japan), Laboratoire d'Informatique du Parallelism (LIP) (Lyon France), University of Tsukuba (Tsukuba, Japan), Universite de Paul Sabatier (Toulouse, France), and the National Center for Scientific Research (Centre Nationale de Recherche Scientifique (CNRS)) Toulouse, France.
His primary research interests include computer architecture, parallel and distributed computing, interconnection networks, optical interconnects for parallel computing systems, reconfigurable computing systems, scalable and power-efficient architectures, fault-tolerant multiprocessors, Network on chips (NoCs) for multi-core and many-core architectures, fault-tolerant and self-healing NoCs, emerging interconnect technologies (photonic, wireless, RF, hybrid) for multi-core architectures and Chip Multiprocessors (CMPs), ded and SoC systems. He has published more than 125 journal articles and conference papers in these areas, and holds several US patents. His research has been sponsored by NSF, DOE, AFOSR, and a number of industrial organizations.
Dr. Louri is the recipient of the National Science Foundation Research Initiation Award (1989), the Best article Award from IEEE Micro, the Advanced Telecommunications Organization of Japan Fellowship, the Centre Nationale de Recherche Scientifique (CNRS), France, Fellowship, and the Japan Society for the Promotion of Science Fellowship, and several teaching awards. Dr. Louri was instrumental in bringing optical interconnects into mainstream research in interconnection networks and bridging the gap between computer architecture and optics research communities. He served as a General Chair for the 13th Annual Symposium of the High Performance Computer Architecture (HPCA-13), Phoenix, Arizona, 2007, the general Co-Chair of the Second Workshop on Optics in Communications and Computer Sciences (WOCCS-99), Toulouse France, 1999, and the General Chair for the Workshop on Optics in High-Performance Computing Systems, Lyon France 1996. He has served as a technical committee member for numerous international conferences including, Optical Society of America, meetings on Optics in Computing, the IEEE/OSA conference on Massively Parallel Processing using Optical Interconnects (MPPOI), the IEEE Symposium on High Performance Computer Architecture (HPCA), the International Symposium on Computer Architecture (ISCA). The International Parallel & Distributed processing Symposium (IPDPS), International conference on Parallel and Distributed computing and Systems (PDCS), the International Conference on Parallel Processing (ICPP), the ACM/IEEE Symposium on Architectures for Networking and Communication Systems (ANCS), the IEEE/ACM International Symposium on Microarchitecture (IEEE Micro), the International Conference on Parallel Architectures and Compilation Techniques (PACT), the ACM/IEEE International Symposium on Networks-on-Chip (NOCS), among several others. He has served as guest editor for Journal of Parallel and Distributed Computing (JPDC), and is currently serving as an associate editor of IEEE Transactions on Computers, and associate editor of IEEE Transactions on Emerging Topics in Computing.
Dr. Louri is a Fellow of IEEE, member of the IEEE Society Technical Committee on Computer Architecture and member of the IEEE Technical Committee on Parallel Processing.
Edwin Hsing-Mean Sha received Ph.D. degree from the Departmentof Computer Science, Princeton University, USA in 1992.From August 1992 to August 2000, he was with the Department of Computer Science and Engineeringat University of Notre Dame, USA.Since 2000, he has been a tenured full professor at the University of Texas at Dallas. Since 2012, he has been serving as the Dean of College of Computer Science at Chongqing University, China.He has published more than 370 research papers inrefereed international conferences and premier journals including over 50 IEEE/ACM Transactions articles. His work has been cited over 3000 times. He served as program committee members and chairs of numerous international conferences and editors of many journals. He receivedmany awards including Teaching Award, Microsoft Trustworthy Computing Curriculum Award, NSF CAREER Award, and NSFC Overseas Distinguished Young Scholar Award, Chang-Jiang Honorary Chair Professorship, China Thousand-Talent Chair Professorship, etc. He received the ACM TODAES Best Paper Award from ACM Transactions on Design Automation of Electronic Systems in 2011, and many other best paper awards.
Dr. Tao Li is a full professor in the Department of Electrical and Computer Engineering at the University of Florida, and currently serves as a Program Director in the CCF division of the National Science Foundation.
He received a Ph.D. in Computer Engineering from the University of Texas at Austin. His research interests include computer architecture, high-performance, energy-efficient, dependable and sustainable computer systems, the impact of emerging technologies and applications on hardware and operating/run-time systems, and evaluation of computer systems. Dr. Tao Li received 2009 National Science Foundation Faculty Early CAREER Award, 2008, 2007, 2006 IBM Faculty Awards, 2008 Microsoft Research Safe and Scalable Multi-core Computing Award and 2006 Microsoft Research Trustworthy Computing Curriculum Award. Dr. Tao Li co-authored a paper that won the Best Paper Award in HPCA 2011 and three papers that were nominated for the Best Paper Awards in ICPP 2015, DSN 2011, MICRO 2008 and MASCOTS 2006. Dr. Tao Li is one of the College of Engineering winners, University of Florida Doctor Dissertation Advisor/Mentoring Award for 2013-2014 and 2011-2012. Dr. Tao Li served as the General Chair of 2014 International Symposium on High Performance Computer Architecture.
邵子立，香港理工大学电子计算学系终身制副教授，副系主任。2005 年在美国德州大学获得博士学位（博士论文获得美国德州大学达拉斯分校Erik Jonsson 工程与计算机学院2004-2005 年度计算机科学最佳博士论文奖），研究方向是嵌入式系统、实时与嵌入式软件。多年来对实时调度、嵌入式系统优化、NAND 闪存、相变存储器做了广泛的研究。在和本项目研究内容密切相关的课题上已经取得了多项研究成果。在国际重要学术期刊和会议上发表超过100 篇学术论文，包括近20篇IEEE Transactions 和ACM Transactions 论文，以及多篇实时系统与嵌入式系统的重要会议论文。
邵子立教授曾担任IEEE/ACM绿色计算与通信国际会议（GreenCOM 2011）会议主席，IEEE 嵌入式和实时计算系统及应用国际会议（RTCSA 2009）会议主席，嵌入式多核片上系统国际研讨会（MCSoC 2007/2009）会议主席，IEEE 嵌入式计算国际研讨会（SEC 2008）会议主席，嵌入式软件和系统国际会议（ICESS 2008）会议主席，嵌入式软件优化国际研讨会2006年会议主席。担任嵌入式领域多个重要国际会议RTSS、RTAS、DATE、ICCAD、EMSOFT、CODES+ISSS、LCTES、ASP-DAC 的程序委员。
邵子立教授是多个国际期刊的副主编，包括IEEE Transactions on Computers (TOC), IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), ACM Transactions on Design Automation of Electronic Systems (TODAES)，ACM Transactions on Cyber-Physical Systems, Journal of Systems Architecture: ded Software Design (Elsevier), 和IEEE ded Systems Letter